Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insns / amoor_d.h

diff --git a/riscv/insns/amoor_d.h b/riscv/insns/amoor_d.h
index 76a45086a5498c4c2783d9c2bead0b172880fa85..87b6f2a6f6b2616026393a4f06802e6eb66330c0 100644 (file)
--- a/riscv/insns/amoor_d.h
+++ b/riscv/insns/amoor_d.h
@@ -1,4 +1,4 @@
 require_xpr64;
-reg_t v = mmu.load_uint64(RS1);
-mmu.store_uint64(RS1, RS2 | v);
+reg_t v = MMU.load_uint64(RS1);
+MMU.store_uint64(RS1, RS2 | v);
 RD = v;