Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / amoor_w.h

diff --git a/riscv/insns/amoor_w.h b/riscv/insns/amoor_w.h
index 0733fad203d4b9382f8fad58b759dbd418796fa9..c178f9af1cc8e8f61bd4a638efbb2118dc9d7227 100644 (file)
--- a/riscv/insns/amoor_w.h
+++ b/riscv/insns/amoor_w.h
@@ -1,3 +1,3 @@
 reg_t v = MMU.load_int32(RS1);
 MMU.store_uint32(RS1, RS2 | v);
-RD = v;
+WRITE_RD(v);