Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / amoxor_d.h

diff --git a/riscv/insns/amoxor_d.h b/riscv/insns/amoxor_d.h
index 25d4fcb580a6197cbfd769a0aeea0e3cf6dc666f..c78e7e3939a1a169ee138e5e81f0800b820e0039 100644 (file)
--- a/riscv/insns/amoxor_d.h
+++ b/riscv/insns/amoxor_d.h
@@ -1,4 +1,4 @@
 require_xpr64;
 reg_t v = MMU.load_uint64(RS1);
 MMU.store_uint64(RS1, RS2 ^ v);
-RD = v;
+WRITE_RD(v);