[xcc, sim] changed instruction format so imm12 subs for rs2

[riscv-isa-sim.git] / riscv / insns / bge.h

diff --git a/riscv/insns/bge.h b/riscv/insns/bge.h
index 66db6b233bb5dee2692d856302c6f963f9692133..45dcc2ee12239aceecb0450724b35cc891e8d7a5 100644 (file)
--- a/riscv/insns/bge.h
+++ b/riscv/insns/bge.h
@@ -1,2 +1,2 @@
-if(sreg_t(cmp_trunc(RA)) >= sreg_t(cmp_trunc(RB)))
+if(sreg_t(cmp_trunc(RS1)) >= sreg_t(cmp_trunc(RS2)))
   npc = BRANCH_TARGET;