[xcc, sim] changed instruction format so imm12 subs for rs2

[riscv-isa-sim.git] / riscv / insns / bgeu.h

diff --git a/riscv/insns/bgeu.h b/riscv/insns/bgeu.h
index 52d66615e2fbad5803b62df861a59c6bc44decb5..2ba3fa81e438f7141403ca22e8b39011ead7cb2a 100644 (file)
--- a/riscv/insns/bgeu.h
+++ b/riscv/insns/bgeu.h
@@ -1,2 +1,2 @@
-if(cmp_trunc(RA) >= cmp_trunc(RB))
+if(cmp_trunc(RS1) >= cmp_trunc(RS2))
   npc = BRANCH_TARGET;