Move towards RVC v1.8

[riscv-isa-sim.git] / riscv / insns / c_addi.h

diff --git a/riscv/insns/c_addi.h b/riscv/insns/c_addi.h
index 2694a0acc59ef33bacb00d1c44e27b58135c2f14..eb983442a37e1407e1eb2240737a5ab76f7820ae 100644 (file)
--- a/riscv/insns/c_addi.h
+++ b/riscv/insns/c_addi.h
@@ -1,2 +1,2 @@
-require_rvc;
-CRD = sext_xprlen(CRD + SIMM);
+require_extension('C');
+WRITE_RD(sext_xlen(RVC_RS1 + insn.rvc_imm()));