Move towards RVC v1.8

[riscv-isa-sim.git] / riscv / insns / c_addi.h

diff --git a/riscv/insns/c_addi.h b/riscv/insns/c_addi.h
index 762f5c2fe144b70b3b4a68a2d134e3b6d27586b0..eb983442a37e1407e1eb2240737a5ab76f7820ae 100644 (file)
--- a/riscv/insns/c_addi.h
+++ b/riscv/insns/c_addi.h
@@ -1,2 +1,2 @@
-require_rvc;
-WRITE_RD(sext_xlen(RVC_RS2 + insn.rvc_imm()));
+require_extension('C');
+WRITE_RD(sext_xlen(RVC_RS1 + insn.rvc_imm()));