[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b
[riscv-isa-sim.git] / riscv / insns / c_eq_s.h
index 062fb745d3ff2604c6d23adc3fc0222e7b28e89f..5500c4cdadc09d4b0b1c0f580b8563b4636140b1 100644 (file)
@@ -1,3 +1,3 @@
 require_fp;
-RC = float32_eq(FRA, FRB);
+RC = f32_eq(FRA, FRB);
 set_fp_exceptions;