New RV64C proposal

[riscv-isa-sim.git] / riscv / insns / c_ld.h

diff --git a/riscv/insns/c_ld.h b/riscv/insns/c_ld.h
index f9c07af65eee731adb3722b8dc39e358bb6bb029..876baddd056cd528f1af7a5354cce7de8288036a 100644 (file)
--- a/riscv/insns/c_ld.h
+++ b/riscv/insns/c_ld.h
@@ -1,3 +1,3 @@
-require_rvc;
-require_xpr64;
-CRDS = mmu.load_int64(CRS1S+CIMM5*8);
+require_extension('C');
+require_rv64;
+WRITE_RVC_RS2S(MMU.load_int64(RVC_RS1S + insn.rvc_ld_imm()));