New RV64C proposal
[riscv-isa-sim.git] / riscv / insns / c_ldsp.h
index 1fbd9bd9515a05bed1e2c5848b6a703e8a97fd49..7047d530d0fd155b801e54b0fb3aeace33ea8396 100644 (file)
@@ -1,3 +1,4 @@
-require_rvc;
-require_xpr64;
-CRD = mmu.load_int64(XPR[30]+CIMM6*8);
+require_extension('C');
+require_rv64;
+require(insn.rvc_rd() != 0);
+WRITE_RD(MMU.load_int64(RVC_SP + insn.rvc_ldsp_imm()));