New RV64C proposal

[riscv-isa-sim.git] / riscv / insns / c_li.h

diff --git a/riscv/insns/c_li.h b/riscv/insns/c_li.h
index e65614ed6d022cb398ea0209980b3ee0dc1edc50..52e99c96005b996b87bce4b9552cb936bca69c6a 100644 (file)
--- a/riscv/insns/c_li.h
+++ b/riscv/insns/c_li.h
@@ -1,2 +1,7 @@
-require_rvc;
-CRD = CIMM6;
+require_extension('C');
+require(insn.rvc_rd() != 0);
+if (insn.rvc_imm() == 0) { // c.jr
+  set_pc(RVC_RS1 & ~reg_t(1));
+} else {
+  WRITE_RD(insn.rvc_imm());
+}