[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / c_lt_s.h

diff --git a/riscv/insns/c_lt_s.h b/riscv/insns/c_lt_s.h
index 1f7a0e191e6d8541dbcd76fe6993541aa0e59924..aef73340d7d88530b11f3173c674c939af7a4090 100644 (file)
--- a/riscv/insns/c_lt_s.h
+++ b/riscv/insns/c_lt_s.h
@@ -1,3 +1,3 @@
 require_fp;
-RC = float32_lt(FRA, FRB);
+RC = f32_lt(FRA, FRB);
 set_fp_exceptions;