Support setting ISA/subsets with --isa flag
[riscv-isa-sim.git] / riscv / insns / c_lw.h
index 4796ab86ac84d035c39cd4f8e7ec450cfb0d7655..f2fc2991d32a0fe5925cf048c8a6bf9fb0892605 100644 (file)
@@ -1,2 +1,2 @@
-require_rvc;
-CRDS = mmu.load_int32(CRS1S+CIMM5*4);
+require_extension('C');
+WRITE_RVC_RDS(MMU.load_int32(RVC_RS1S + insn.rvc_lw_imm()));