New RV64C proposal

[riscv-isa-sim.git] / riscv / insns / c_mv.h

diff --git a/riscv/insns/c_mv.h b/riscv/insns/c_mv.h
index bc05cfe9d72e86a5bef14ef943171e319ab9c490..df5cea6c260c038e3c67cf6e9a68dfe641c7fc0c 100644 (file)
--- a/riscv/insns/c_mv.h
+++ b/riscv/insns/c_mv.h
@@ -1,2 +1,3 @@
 require_extension('C');
-WRITE_RD(RVC_RS1);
+require(insn.rvc_rd() != 0);
+WRITE_RD(RVC_RS2);