New RV64C proposal
[riscv-isa-sim.git] / riscv / insns / c_sdsp.h
index 6028b0fbf73f8904016081697268b0ce5e6882d4..e59e00b1a74056d62616abb2700354771721de25 100644 (file)
@@ -1,3 +1,3 @@
-require_rvc;
+require_extension('C');
 require_rv64;
-MMU.store_uint64(RVC_SP + insn.rvc_ldsp_imm(), RVC_RS2);
+MMU.store_uint64(RVC_SP + insn.rvc_sdsp_imm(), RVC_RS2);