New RV64C proposal
[riscv-isa-sim.git] / riscv / insns / c_sdsp.h
index ca97d510803144d4c4122f2c11f86f84410a7af8..e59e00b1a74056d62616abb2700354771721de25 100644 (file)
@@ -1,3 +1,3 @@
-require_rvc;
-require_xpr64;
-mmu.store_uint64(XPR[30]+CIMM6*8, CRS2);
+require_extension('C');
+require_rv64;
+MMU.store_uint64(RVC_SP + insn.rvc_sdsp_imm(), RVC_RS2);