Fix for issue #183: No illegal instruction exception for c.sxxi instructions encoded...
[riscv-isa-sim.git] / riscv / insns / c_srai.h
index 87d7b5955272df1a1148df5643ee4b1d9b1f9cc6..7b594e9ef1f48cccc2262aa4e28e9d0f8aed8b57 100644 (file)
@@ -1,3 +1,3 @@
 require_extension('C');
-require(insn.rvc_imm() < xlen);
-WRITE_RD(sext_xlen(sext_xlen(RVC_RS1) >> insn.rvc_imm()));
+require(insn.rvc_zimm() < xlen && insn.rvc_zimm() > 0);
+WRITE_RVC_RS1S(sext_xlen(sext_xlen(RVC_RS1S) >> insn.rvc_zimm()));