Fix for issue #183: No illegal instruction exception for c.sxxi instructions encoded...

[riscv-isa-sim.git] / riscv / insns / c_srai.h

diff --git a/riscv/insns/c_srai.h b/riscv/insns/c_srai.h
index f6638b1e2747c7bc2ec8bb268230658ff4f77052..7b594e9ef1f48cccc2262aa4e28e9d0f8aed8b57 100644 (file)
--- a/riscv/insns/c_srai.h
+++ b/riscv/insns/c_srai.h
@@ -1,3 +1,3 @@
 require_extension('C');
-require(insn.rvc_zimm() < xlen);
+require(insn.rvc_zimm() < xlen && insn.rvc_zimm() > 0);
 WRITE_RVC_RS1S(sext_xlen(sext_xlen(RVC_RS1S) >> insn.rvc_zimm()));