Support setting ISA/subsets with --isa flag
[riscv-isa-sim.git] / riscv / insns / c_swsp.h
index 0508f120ba6dc1ace170e27a31f965a252774631..6f3fef0dcdf15855f30a3a3e4a35ee5c6d4e7182 100644 (file)
@@ -1,2 +1,2 @@
-require_rvc;
-mmu.store_uint32(XPR[30]+CIMM6*4, CRS2);
+require_extension('C');
+MMU.store_uint32(RVC_SP + insn.rvc_lwsp_imm(), RVC_RS2);