New RDCYCLE encoding

[riscv-isa-sim.git] / riscv / insns / csrrci.h

diff --git a/riscv/insns/csrrci.h b/riscv/insns/csrrci.h
index d671f3b0b7ed10fd8c28df1cf10c0f9c0d51c033..fc980569e61fbc28940e2bf6cb734744f4061a6d 100644 (file)
--- a/riscv/insns/csrrci.h
+++ b/riscv/insns/csrrci.h
@@ -1,2 +1,2 @@
-int csr = validate_csr(insn.i_imm(), true);
+int csr = validate_csr(insn.csr(), true);
 WRITE_RD(p->set_pcr(csr, p->get_pcr(csr) & ~(reg_t)insn.rs1()));