[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / cvt_s_d.h

diff --git a/riscv/insns/cvt_s_d.h b/riscv/insns/cvt_s_d.h
index 528f11ca6e12d1f9e85f0c00080bd01fd879f82e..0ee755e8e6ecb3a7ac559e7d3cafe0fabf14796f 100644 (file)
--- a/riscv/insns/cvt_s_d.h
+++ b/riscv/insns/cvt_s_d.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = float64_to_float32(FRA);
+FRC = f64_to_f32(FRA);
 set_fp_exceptions;