[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / cvt_s_w.h

diff --git a/riscv/insns/cvt_s_w.h b/riscv/insns/cvt_s_w.h
index c2d583fcf2fe541e3d309c9bcbb3839218357cbd..5bbe61f172ce06c378e6454336fa1ce385a17037 100644 (file)
--- a/riscv/insns/cvt_s_w.h
+++ b/riscv/insns/cvt_s_w.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = int32_to_float32(FRA);
+FRC = i32_to_f32(FRA);
 set_fp_exceptions;