[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / cvtu_d_w.h

diff --git a/riscv/insns/cvtu_d_w.h b/riscv/insns/cvtu_d_w.h
index 67702a20b9409d94c558e3db78a5c0f82d898485..1a61ad6417fc0b5f6671301362877e800c91b7bb 100644 (file)
--- a/riscv/insns/cvtu_d_w.h
+++ b/riscv/insns/cvtu_d_w.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = int32_to_float64(FRA);
+FRC = ui32_to_f64(FRA);
 set_fp_exceptions;