Support setting ISA/subsets with --isa flag
[riscv-isa-sim.git] / riscv / insns / divu.h
index 68f96a5d0768bf48451c93ee5ef99c2e78f27701..31d758560b8e5b9074c74292b871f32bd5207d06 100644 (file)
@@ -1,2 +1,7 @@
-RC = sext32(uint32_t(RA)/uint32_t(RB));
-
+require_extension('M');
+reg_t lhs = zext_xlen(RS1);
+reg_t rhs = zext_xlen(RS2);
+if(rhs == 0)
+  WRITE_RD(UINT64_MAX);
+else
+  WRITE_RD(sext_xlen(lhs / rhs));