Support setting ISA/subsets with --isa flag
[riscv-isa-sim.git] / riscv / insns / divuw.h
index 68f96a5d0768bf48451c93ee5ef99c2e78f27701..e127619aa990ad3394c16810268be611543ef221 100644 (file)
@@ -1,2 +1,8 @@
-RC = sext32(uint32_t(RA)/uint32_t(RB));
-
+require_extension('M');
+require_rv64;
+reg_t lhs = zext32(RS1);
+reg_t rhs = zext32(RS2);
+if(rhs == 0)
+  WRITE_RD(UINT64_MAX);
+else
+  WRITE_RD(sext32(lhs / rhs));