Support setting ISA/subsets with --isa flag
[riscv-isa-sim.git] / riscv / insns / divw.h
index 0654b490b8c3f3a081feb731a47fd1c91b3c013f..11be17e4c33d450244c42d98c99d2c31c8a35bd9 100644 (file)
@@ -1,2 +1,8 @@
-RD = sext32(int32_t(RS1)/int32_t(RS2));
-
+require_extension('M');
+require_rv64;
+sreg_t lhs = sext32(RS1);
+sreg_t rhs = sext32(RS2);
+if(rhs == 0)
+  WRITE_RD(UINT64_MAX);
+else
+  WRITE_RD(sext32(lhs / rhs));