[xcc] instructions now set PC explicitly

[riscv-isa-sim.git] / riscv / insns / eret.h

diff --git a/riscv/insns/eret.h b/riscv/insns/eret.h
index 37e85885ffd6186d0f277d6dcd1ecabb96b49a5c..46d5bed27ef40a8f8af61607c67933ff30b73c46 100644 (file)
--- a/riscv/insns/eret.h
+++ b/riscv/insns/eret.h
@@ -2,4 +2,4 @@ require_supervisor;
 if(sr & SR_ET)
   throw trap_illegal_instruction;
 set_sr(((sr & SR_PS) ? sr : (sr & ~SR_S)) | SR_ET);
-npc = epc;
+set_pc(epc);