Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fcvt_d_lu.h

diff --git a/riscv/insns/fcvt_d_lu.h b/riscv/insns/fcvt_d_lu.h
index 203275863ff1253f44136f9b29115db7f1324393..bef89ebd3ec4c2f96d3f6fda2763ee05af2352b3 100644 (file)
--- a/riscv/insns/fcvt_d_lu.h
+++ b/riscv/insns/fcvt_d_lu.h
@@ -1,5 +1,5 @@
 require_xpr64;
 require_fp;
 softfloat_roundingMode = RM;
-FRD = ui64_to_f64(RS1);
+WRITE_FRD(ui64_to_f64(RS1));
 set_fp_exceptions;