Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fcvt_d_w.h

diff --git a/riscv/insns/fcvt_d_w.h b/riscv/insns/fcvt_d_w.h
index 52abd7597125b82d88418351fbd7b3cee3e0f737..ce56974aa7c0e1b6249c86d65c9a8631ef959345 100644 (file)
--- a/riscv/insns/fcvt_d_w.h
+++ b/riscv/insns/fcvt_d_w.h
@@ -1,4 +1,4 @@
 require_fp;
 softfloat_roundingMode = RM;
-FRD = i32_to_f64((int32_t)RS1);
+WRITE_FRD(i32_to_f64((int32_t)RS1));
 set_fp_exceptions;