[xcc] minor performance tweaks

[riscv-isa-sim.git] / riscv / insns / fcvt_d_wu.h

diff --git a/riscv/insns/fcvt_d_wu.h b/riscv/insns/fcvt_d_wu.h
index 2757790f1500d43986cfcf0970ec006f80d256d7..61a8a788a34d41e6aa79e943b35cb09f5dc89993 100644 (file)
--- a/riscv/insns/fcvt_d_wu.h
+++ b/riscv/insns/fcvt_d_wu.h
@@ -1,4 +1,4 @@
 require_fp;
 softfloat_roundingMode = RM;
-FRD = ui32_to_f64(RS1);
+FRD = ui32_to_f64((uint32_t)RS1);
 set_fp_exceptions;