Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fcvt_l_s.h

diff --git a/riscv/insns/fcvt_l_s.h b/riscv/insns/fcvt_l_s.h
index e05f4761c5e81573ea39ab332ac8ffacdae57fa0..1259234ec4a48c15d48c6eae578aa6358ace6441 100644 (file)
--- a/riscv/insns/fcvt_l_s.h
+++ b/riscv/insns/fcvt_l_s.h
@@ -1,5 +1,5 @@
 require_xpr64;
 require_fp;
 softfloat_roundingMode = RM;
-RD = f32_to_i64(FRS1, RM, true);
+WRITE_RD(f32_to_i64(FRS1, RM, true));
 set_fp_exceptions;