Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fcvt_lu_d.h

diff --git a/riscv/insns/fcvt_lu_d.h b/riscv/insns/fcvt_lu_d.h
index 44c3dd6ba426c12cefa03728d0c0f77d6329b0e2..d69b36b1e2e7f293b27c4a2686082c3ae289f9dd 100644 (file)
--- a/riscv/insns/fcvt_lu_d.h
+++ b/riscv/insns/fcvt_lu_d.h
@@ -1,5 +1,5 @@
 require_xpr64;
 require_fp;
 softfloat_roundingMode = RM;
-RD = f64_to_ui64(FRS1, RM, true);
+WRITE_RD(f64_to_ui64(FRS1, RM, true));
 set_fp_exceptions;