[xcc] minor performance tweaks
[riscv-isa-sim.git] / riscv / insns / fcvt_lu_s.h
index 1ed4594c045e033d43b424bbf3f298e2d384b8f2..13de43689ebbef7178e00249659507fada835046 100644 (file)
@@ -1,5 +1,5 @@
 require_xpr64;
 require_fp;
 softfloat_roundingMode = RM;
-RD = f32_to_i64_r_minMag(FRS1,true);
+RD = f32_to_ui64(FRS1, RM, true);
 set_fp_exceptions;