Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fcvt_s_l.h

diff --git a/riscv/insns/fcvt_s_l.h b/riscv/insns/fcvt_s_l.h
index f149229d860a3078453fb1dedef65267ddd4ab00..98570ab94ca8cc47ce31a59e67c5fddf86bedb79 100644 (file)
--- a/riscv/insns/fcvt_s_l.h
+++ b/riscv/insns/fcvt_s_l.h
@@ -1,5 +1,5 @@
 require_xpr64;
 require_fp;
 softfloat_roundingMode = RM;
-FRD = i64_to_f32(RS1);
+WRITE_FRD(i64_to_f32(RS1));
 set_fp_exceptions;