Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fcvt_s_lu.h

diff --git a/riscv/insns/fcvt_s_lu.h b/riscv/insns/fcvt_s_lu.h
index d9d0946ac0bff976ccd2ddf05d50fe86b70fa5c5..921bfcfbb4ffb6c9698c1b066fb0ca65980bc721 100644 (file)
--- a/riscv/insns/fcvt_s_lu.h
+++ b/riscv/insns/fcvt_s_lu.h
@@ -1,5 +1,5 @@
 require_xpr64;
 require_fp;
 softfloat_roundingMode = RM;
-FRD = ui64_to_f32(RS1);
+WRITE_FRD(ui64_to_f32(RS1));
 set_fp_exceptions;