projects
/
riscv-isa-sim.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
| inline |
side by side
Use WRITE_RD/WRITE_FRD macros to write registers
[riscv-isa-sim.git]
/
riscv
/
insns
/
fcvt_s_wu.h
diff --git
a/riscv/insns/fcvt_s_wu.h
b/riscv/insns/fcvt_s_wu.h
index abb782c38126d777928907cc3ba724215121ed49..ca8d2b603f5fcc60e698cd29cf35b2e923a005dc 100644
(file)
--- a/
riscv/insns/fcvt_s_wu.h
+++ b/
riscv/insns/fcvt_s_wu.h
@@
-1,4
+1,4
@@
require_fp;
softfloat_roundingMode = RM;
-
FRD = ui32_to_f32((uint32_t)RS1
);
+
WRITE_FRD(ui32_to_f32((uint32_t)RS1)
);
set_fp_exceptions;