Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fcvt_wu_d.h

diff --git a/riscv/insns/fcvt_wu_d.h b/riscv/insns/fcvt_wu_d.h
index 43ad6f63d30c497d5154b70af4c0f4c2a8717356..5cf44d153721eb525241c9253b4a616d5e897ff0 100644 (file)
--- a/riscv/insns/fcvt_wu_d.h
+++ b/riscv/insns/fcvt_wu_d.h
@@ -1,4 +1,4 @@
 require_fp;
 softfloat_roundingMode = RM;
-RD = sext32(f64_to_ui32(FRS1, RM, true));
+WRITE_RD(sext32(f64_to_ui32(FRS1, RM, true)));
 set_fp_exceptions;