Upgrade to latest SoftFloat
[riscv-isa-sim.git] / riscv / insns / fcvt_wu_s.h
index 2c1ff005ec660a97f6ca11f629ae0d38f8ea947d..034d6816238b8597f87ab071bcbfd40bce3f45ac 100644 (file)
@@ -1,5 +1,5 @@
 require_extension('F');
 require_fp;
 softfloat_roundingMode = RM;
-WRITE_RD(sext32(f32_to_ui32(FRS1, RM, true)));
+WRITE_RD(sext32(f32_to_ui32(f32(FRS1), RM, true)));
 set_fp_exceptions;