Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fcvt_wu_s.h

diff --git a/riscv/insns/fcvt_wu_s.h b/riscv/insns/fcvt_wu_s.h
index ff7a11cf73062f48969529d581b8c42048b80039..5b4c4444bab2d0cceb8eebdbde5e1f8eb9124ec1 100644 (file)
--- a/riscv/insns/fcvt_wu_s.h
+++ b/riscv/insns/fcvt_wu_s.h
@@ -1,4 +1,4 @@
 require_fp;
 softfloat_roundingMode = RM;
-RD = sext32(f32_to_ui32(FRS1, RM, true));
+WRITE_RD(sext32(f32_to_ui32(FRS1, RM, true)));
 set_fp_exceptions;