Upgrade to latest SoftFloat
[riscv-isa-sim.git] / riscv / insns / feq_d.h
index 43d9c1cda01673b3a3a0d7d0448a97ef759738b7..541ed5bbc95e7331acef0c5673dd126e4d3ee3c4 100644 (file)
@@ -1,4 +1,4 @@
 require_extension('D');
 require_fp;
-WRITE_RD(f64_eq(FRS1, FRS2));
+WRITE_RD(f64_eq(f64(FRS1), f64(FRS2)));
 set_fp_exceptions;