Upgrade to latest SoftFloat
[riscv-isa-sim.git] / riscv / insns / fle_s.h
index 0884c5197ce789e25290e620c829f8a12aaea388..5c0124ef28df81511c9ab2c47f5ecfa7238f67e4 100644 (file)
@@ -1,4 +1,4 @@
 require_extension('F');
 require_fp;
-WRITE_RD(f32_le(FRS1, FRS2));
+WRITE_RD(f32_le(f32(FRS1), f32(FRS2)));
 set_fp_exceptions;