Merge pull request #156 from p12nGH/noncontiguous_harts
[riscv-isa-sim.git] / riscv / insns / fmax_d.h
index f0bea9bb2dbf679729f359a7af99fd9ff0b5a11c..11491f54bce66c61e6d8af1ee9634603238937d0 100644 (file)
@@ -1,4 +1,9 @@
 require_extension('D');
 require_fp;
-WRITE_FRD(isNaNF64UI(FRS2) || f64_le_quiet(f64(FRS2), f64(FRS1)) ? FRS1 : FRS2);
+bool greater = f64_lt_quiet(f64(FRS2), f64(FRS1)) ||
+               (f64_eq(f64(FRS2), f64(FRS1)) && (f64(FRS2).v & F64_SIGN));
+if (isNaNF64UI(f64(FRS1).v) && isNaNF64UI(f64(FRS2).v))
+  WRITE_FRD(f64(defaultNaNF64UI));
+else
+  WRITE_FRD(greater || isNaNF64UI(f64(FRS2).v) ? FRS1 : FRS2);
 set_fp_exceptions;