Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fmax_d.h

diff --git a/riscv/insns/fmax_d.h b/riscv/insns/fmax_d.h
index cbbb34343b79f983f902da3254b0fa8a4e92f72a..a26aeabb4c6537d9fcf3990df9febcff9aec29be 100644 (file)
--- a/riscv/insns/fmax_d.h
+++ b/riscv/insns/fmax_d.h
@@ -1,4 +1,4 @@
 require_fp;
-FRD = isNaNF64UI(FRS2) || f64_le_quiet(FRS2,FRS1) /* && FRS1 not NaN */
-      ? FRS1 : FRS2;
+WRITE_FRD(isNaNF64UI(FRS2) || f64_le_quiet(FRS2,FRS1) /* && FRS1 not NaN */
+      ? FRS1 : FRS2);
 set_fp_exceptions;