Merge pull request #156 from p12nGH/noncontiguous_harts
[riscv-isa-sim.git] / riscv / insns / fmax_s.h
index bf90356b6748c68b22dfb1f5eb4f2b2e3a64f464..41d8f921fdec4eba9eb7f42cb4a58597ae6d6c87 100644 (file)
@@ -1,6 +1,9 @@
 require_extension('F');
 require_fp;
-WRITE_FRD(f32_le_quiet(f32(FRS2), f32(FRS1)) || isNaNF32UI(FRS2) ? FRS1 : FRS2);
-if ((isNaNF32UI(FRS1) && isNaNF32UI(FRS2)) || softfloat_exceptionFlags)
-  WRITE_FRD(defaultNaNF32UI);
+bool greater = f32_lt_quiet(f32(FRS2), f32(FRS1)) ||
+               (f32_eq(f32(FRS2), f32(FRS1)) && (f32(FRS2).v & F32_SIGN));
+if (isNaNF32UI(f32(FRS1).v) && isNaNF32UI(f32(FRS2).v))
+  WRITE_FRD(f32(defaultNaNF32UI));
+else
+  WRITE_FRD(greater || isNaNF32UI(f32(FRS2).v) ? FRS1 : FRS2);
 set_fp_exceptions;