Merge pull request #156 from p12nGH/noncontiguous_harts
[riscv-isa-sim.git] / riscv / insns / fmin_s.h
index 831a7a255fed3fb8fd32083554a2255579221877..19e119381df1c2ae64d2e9d26c799080b8c580e0 100644 (file)
@@ -1,6 +1,9 @@
 require_extension('F');
 require_fp;
-WRITE_FRD(f32_lt_quiet(f32(FRS1), f32(FRS2)) || isNaNF32UI(FRS2) ? FRS1 : FRS2);
-if ((isNaNF32UI(FRS1) && isNaNF32UI(FRS2)) || softfloat_exceptionFlags)
-  WRITE_FRD(defaultNaNF32UI);
+bool less = f32_lt_quiet(f32(FRS1), f32(FRS2)) ||
+            (f32_eq(f32(FRS1), f32(FRS2)) && (f32(FRS1).v & F32_SIGN));
+if (isNaNF32UI(f32(FRS1).v) && isNaNF32UI(f32(FRS2).v))
+  WRITE_FRD(f32(defaultNaNF32UI));
+else
+  WRITE_FRD(less || isNaNF32UI(f32(FRS2).v) ? FRS1 : FRS2);
 set_fp_exceptions;