Upgrade to latest SoftFloat
[riscv-isa-sim.git] / riscv / insns / fmsub_d.h
index 696f8226ec90fa77de89c67b8f46586681f6eee9..afcea88e693d77b3c90d6a7351304d29bff8e43a 100644 (file)
@@ -1,5 +1,5 @@
 require_extension('D');
 require_fp;
 softfloat_roundingMode = RM;
-WRITE_FRD(f64_mulAdd(FRS1, FRS2, FRS3 ^ (uint64_t)INT64_MIN));
+WRITE_FRD(f64_mulAdd(f64(FRS1), f64(FRS2), f64(FRS3 ^ (uint64_t)INT64_MIN)).v);
 set_fp_exceptions;