Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fmul_d.h

diff --git a/riscv/insns/fmul_d.h b/riscv/insns/fmul_d.h
index a1462d3e1631b0f74a8f914c7f75ca3fd2acabe6..e2ca1c2a68445ee74b9af3adc0c8e8072583d7fb 100644 (file)
--- a/riscv/insns/fmul_d.h
+++ b/riscv/insns/fmul_d.h
@@ -1,4 +1,4 @@
 require_fp;
 softfloat_roundingMode = RM;
-FRD = f64_mulAdd(FRS1, FRS2, (FRS1 ^ FRS2) & (uint64_t)INT64_MIN);
+WRITE_FRD(f64_mulAdd(FRS1, FRS2, (FRS1 ^ FRS2) & (uint64_t)INT64_MIN));
 set_fp_exceptions;