Upgrade to latest SoftFloat

[riscv-isa-sim.git] / riscv / insns / fmul_s.h

diff --git a/riscv/insns/fmul_s.h b/riscv/insns/fmul_s.h
index 284aeb399edf77863f98784336c31f6c643ab739..9ae7b3c64edbbd65c971055607937b54c0e96a9a 100644 (file)
--- a/riscv/insns/fmul_s.h
+++ b/riscv/insns/fmul_s.h
@@ -1,5 +1,5 @@
 require_extension('F');
 require_fp;
 softfloat_roundingMode = RM;
-WRITE_FRD(f32_mulAdd(FRS1, FRS2, (FRS1 ^ FRS2) & (uint32_t)INT32_MIN));
+WRITE_FRD(f32_mul(f32(FRS1), f32(FRS2)).v);
 set_fp_exceptions;