Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fmv_d_x.h

diff --git a/riscv/insns/fmv_d_x.h b/riscv/insns/fmv_d_x.h
index 29792ec425b41048e960568fc37f712dcc13eeae..35c1977c82610e38ef5a4184bbf76fda658c8ca9 100644 (file)
--- a/riscv/insns/fmv_d_x.h
+++ b/riscv/insns/fmv_d_x.h
@@ -1,3 +1,3 @@
 require_xpr64;
 require_fp;
-FRD = RS1;
+WRITE_FRD(RS1);