Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fmv_s_x.h

diff --git a/riscv/insns/fmv_s_x.h b/riscv/insns/fmv_s_x.h
index 54546ea23805f62dd3fd4a2b05169348ca6a411a..f3eac828625486d3590c9138761ebfa07b6bd7cd 100644 (file)
--- a/riscv/insns/fmv_s_x.h
+++ b/riscv/insns/fmv_s_x.h
@@ -1,2 +1,2 @@
 require_fp;
-FRD = RS1;
+WRITE_FRD(RS1);